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  VS Arduino › › › ESP32 Firmware Upload via JTAG Failing
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ESP32 Firmware Upload via JTAG Failing
Dec 11th, 2022 at 6:16am
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I recently just got some PCBs of a project I had on protoboard, but now I'm unable to program the ESP32s on the new boards.
The biggest difference is the new board uses a Wrover, where the protoboard uses a Wroom.


At the moment I'm just trying to upload some test firmware via my J-Link. Here is the console output.

Code
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Compiling 'ESP32_DHT11_Test' for 'ESP32 Wrover Module                                                                                                        (esp32_esp32wrover)'
Program size: 319,852 bytes (used 5% of a 6,553,600 byte maximum) (8.66 secs)
Minimum Memory Usage: 15752 bytes (0% of a 3604480 byte maximum)

Uploading 'ESP32_DHT11_Test' to 'ESP32 Wrover Module                                                                                                        (esp32_esp32wrover)' using 'Segger J-Link'
Uploader started for board ESP32 Wrover Module                                                                                                        (esp32_esp32wrover)
Uploader will use programmer name: espjlink
C:\ProgramData\vmicro\tools\openocd-espressif-esp32-10.0.1\bin\openocd.exe -d2 -s s/" -f "interface/jlink.cfg" -f "board/esp32-wrover.cfg" -c "echo -n {****[vMicro]**** Uploading App :}" -c "telnet_port disabled; program s/partitions/boot_app0.bin} 0xe000" -c "echo -n {****[vMicro]**** Uploading Bootloader :}" -c "program elease/ESP32_DHT11_Test.ino.bootloader.bin} 0x1000" -c "echo -n {****[vMicro]**** Uploading Sketch :}" -c "program elease/ESP32_DHT11_Test.ino.bin} 0x10000" -c "echo -n {****[vMicro]**** Uploading Partitions :}" -c "program elease/ESP32_DHT11_Test.ino.partitions.bin} 0x8000 reset; shutdown"
Open On-Chip Debugger  v0.10.0-esp32-20190313 (2019-03-13-09:57)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
debug_level: 2
adapter speed: 20000 kHz
Info : Configured 2 cores
esp32 interrupt mask on
****[vMicro]**** Uploading App :Info : J-Link ARM V8 compiled Nov 28 2014 13:44:46
Info : Hardware version: 8.00
Info : VTarget = 3.332 V
Info : Reduced speed from 20000 kHz to 12000 kHz (maximum).
Info : Reduced speed from 20000 kHz to 12000 kHz (maximum).
Info : clock speed 20000 kHz
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : esp32: Debug controller 0 was reset (pwrstat=0x5F, after clear 0x0F).
Info : esp32: Core 0 was reset (pwrstat=0x5F, after clear 0x0F).
Info : esp32: Debug controller 1 was reset (pwrstat=0x5F, after clear 0x0F).
Info : esp32: Core 1 was reset (pwrstat=0x5F, after clear 0x0F).
Info : Detected debug stubs @ 3ffc0fc4 on core0 of target 'esp32'
Info : Listening on port 3333 for gdb connections
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : Target halted. PRO_CPU: PC=0x400ED1FA (active)    APP_CPU: PC=0x4008AD44
Error: cpu0: xtensa_write_memory (line 802): DSR (FFFFFFFF) indicates target still busy!
Error during upload using programmer
The uploader process failed

The uploader process failed
The uploader returned an error
Error: cpu0: xtensa_write_memory (line 802): DSR (FFFFFFFF) indicates DIR instruction generated an exception!
Error: cpu0: xtensa_write_memory (line 802): DSR (FFFFFFFF) indicates DIR instruction generated an overrun!
Warn : esp32: Failed writing 4 bytes at address 0x3ff48000, data - 00, 20, 49, 9c, 4c, 00, 00, 00
Error: xtensa_write_uint32_list: error writing to 3ff48000
Warn : esp32_soc_reset xtensa_write_uint32_list (reg_value_pairs_pre) err=-4
in procedure 'program'
embedded:startup.tcl:480: Error: ** Unable to reset target **
in procedure 'program'
in procedure 'program_error' called at file "embedded:startup.tcl", line 505
at file "embedded:startup.tcl", line 480
Info : Restore debug stubs @ 3ffc0fc4 on core0 of target 'esp32'
Warn : Flash driver of esp32.flash does not support free_driver_priv()
Warn : Flash driver of irom does not support free_driver_priv()
Warn : Flash driver of drom does not support free_driver_priv()


It may be worth noting, that when trying to upload via Serial or Espresiff's Flash Download Tool it also fails.
Serial only seems to program boot_app0.bin and then times out waiting for the packet header.
The only thing it says that might signify an issue is that its unable to detect flash size, which is 16MB.
Code
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Warning: Could not auto-detect Flash size (FlashID=0x0, SizeID=0x0), defaulting to 4MB



For some reason or another I am able to program the device from VisualGDB, I created a mirror test project and it is able to program the firmware(via JTAG), though I much prefer Visual Micro over VisualGDB for Arduino projects.

Here is the VisualGDB output for comparison, maybe it will help.
Code
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core\bin\openocd.exe -c "gdb_port 50710" -c "telnet_port 50708" -f interface/jlink.cfg -c "adapter_khz 3000" -c "set ESP32_FLASH_VOLTAGE 3.3" -f target/esp32.cfg -c "echo VisualGDB_OpenOCD_Ready"
Open On-Chip Debugger 0.10.0 (2022-05-03)
Licensed under GNU GPL v2
libusb1 09e75e98b4d9ea7909e8837b7a3f00dda4589dc3
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
DEPRECATED! use 'adapter speed' not 'adapter_khz'
adapter speed: 3000 kHz

3.3
VisualGDB_OpenOCD_Ready
Info : Listening on port 6666 for tcl connections
Info : Listening on port 50708 for telnet connections
Info : J-Link ARM V8 compiled Nov 28 2014 13:44:46
Info : Hardware version: 8.00
Info : VTarget = 3.332 V
Info : clock speed 3000 kHz
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : esp32.cpu0: Debug controller was reset.
Info : esp32.cpu0: Core was reset.
Info : esp32.cpu0: Detected debug stubs @ 3ffc0fc4
Info : esp32.cpu1: Debug controller was reset.
Info : esp32.cpu1: Core was reset.
Info : starting gdb server for esp32.cpu0 on 50710
Info : Listening on port 50710 for gdb connections
Info : accepting 'gdb' connection on tcp/50710
Info : esp32.cpu0: Target halted, PC=0x400ED1FA, debug_reason=00000000
Info : Set GDB target to 'esp32.cpu0'
Info : esp32.cpu1: Target halted, PC=0x4008AE13, debug_reason=00000000
Warn : Not full dbg stub table 1 of 2
Warn : No symbols for FreeRTOS!
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : Flash mapping 0: 0x10020 -> 0x3f400020, 65 KB
Info : Flash mapping 1: 0x30018 -> 0x400d0018, 117 KB
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : Auto-detected flash bank 'esp32.cpu0.flash' size 16384 KB
Info : Using flash bank 'esp32.cpu0.flash' size 16384 KB
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : Flash mapping 0: 0x10020 -> 0x3f400020, 65 KB
Info : Flash mapping 1: 0x30018 -> 0x400d0018, 117 KB
Info : Using flash bank 'esp32.cpu0.irom' size 120 KB
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : Flash mapping 0: 0x10020 -> 0x3f400020, 65 KB
Info : Flash mapping 1: 0x30018 -> 0x400d0018, 117 KB
Info : Using flash bank 'esp32.cpu0.drom' size 68 KB
Info : New GDB Connection: 1, Target esp32.cpu0, state: halted
Warn : Prefer GDB command "target extended-remote :50710" instead of "target remote :50710"
force hard breakpoints
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : esp32.cpu0: Debug controller was reset.
Info : esp32.cpu0: Core was reset.
Info : esp32.cpu0: Target halted, PC=0x500000CF, debug_reason=00000000
Info : esp32.cpu0: Core was reset.
Info : esp32.cpu0: Target halted, PC=0x40000400, debug_reason=00000000
Info : esp32.cpu1: Debug controller was reset.
Info : esp32.cpu1: Core was reset.
Info : esp32.cpu1: Target halted, PC=0x40000400, debug_reason=00000000
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : esp32.cpu0: Debug controller was reset.
Info : esp32.cpu0: Core was reset.
Info : esp32.cpu0: Target halted, PC=0x500000CF, debug_reason=00000000
Info : esp32.cpu0: Core was reset.
Info : esp32.cpu0: Target halted, PC=0x40000400, debug_reason=00000000
Info : esp32.cpu1: Debug controller was reset.
Info : esp32.cpu1: Core was reset.
Info : esp32.cpu1: Target halted, PC=0x40000400, debug_reason=00000000
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : Flash mapping 0: 0x10020 -> 0x3f400020, 65 KB
Info : Flash mapping 1: 0x30018 -> 0x400d0018, 117 KB
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : Auto-detected flash bank 'esp32.cpu1.flash' size 16384 KB
Info : Using flash bank 'esp32.cpu1.flash' size 16384 KB
** Programming Started **
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : PROF: Erased 8192 bytes in 400.188 ms
Info : PROF: Data transferred in 126.602 ms @ 63.1902 KB/s
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : PROF: Wrote 8192 bytes in 633.03 ms (data transfer time included)
** Programming Finished in 2371 ms **
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : esp32.cpu0: Debug controller was reset.
Info : esp32.cpu0: Core was reset.
Info : esp32.cpu0: Target halted, PC=0x500000CF, debug_reason=00000000
Info : esp32.cpu0: Core was reset.
Info : esp32.cpu0: Target halted, PC=0x40000400, debug_reason=00000000
Info : esp32.cpu1: Debug controller was reset.
Info : esp32.cpu1: Core was reset.
Info : esp32.cpu1: Target halted, PC=0x40000400, debug_reason=00000000
** Programming Started **
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : PROF: Erased 16384 bytes in 476.184 ms
Info : PROF: Data transferred in 252.295 ms @ 63.4178 KB/s
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : PROF: Wrote 16384 bytes in 787.659 ms (data transfer time included)
** Programming Finished in 1933 ms **
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : esp32.cpu0: Debug controller was reset.
Info : esp32.cpu0: Core was reset.
Info : esp32.cpu0: Target halted, PC=0x500000CF, debug_reason=00000000
Info : esp32.cpu0: Core was reset.
Info : esp32.cpu0: Target halted, PC=0x40000400, debug_reason=00000000
Info : esp32.cpu1: Debug controller was reset.
Info : esp32.cpu1: Core was reset.
Info : esp32.cpu1: Target halted, PC=0x40000400, debug_reason=00000000
** Programming Started **
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : PROF: Erased 266240 bytes in 1568.36 ms
Info : PROF: Data transferred in 3812.13 ms @ 68.2034 KB/s
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : PROF: Wrote 266240 bytes in 4404.97 ms (data transfer time included)
** Programming Finished in 6642 ms **
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : esp32.cpu0: Debug controller was reset.
Info : esp32.cpu0: Core was reset.
Info : esp32.cpu0: Target halted, PC=0x500000CF, debug_reason=00000000
Info : esp32.cpu0: Core was reset.
Info : esp32.cpu0: Target halted, PC=0x40000400, debug_reason=00000000
Info : esp32.cpu1: Debug controller was reset.
Info : esp32.cpu1: Core was reset.
Info : esp32.cpu1: Target halted, PC=0x40000400, debug_reason=00000000
** Programming Started **
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : PROF: Erased 4096 bytes in 368.733 ms
Info : PROF: Data transferred in 78.195 ms @ 51.1542 KB/s
Info : esp32.cpu0: Target halted, PC=0x4009260E, debug_reason=00000001
Info : PROF: Wrote 4096 bytes in 587.438 ms (data transfer time included)
** Programming Finished in 1626 ms **
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : esp32.cpu0: Debug controller was reset.
Info : esp32.cpu0: Core was reset.
Info : esp32.cpu0: Target halted, PC=0x500000CF, debug_reason=00000000
Info : esp32.cpu0: Core was reset.
Info : esp32.cpu0: Target halted, PC=0x40000400, debug_reason=00000000
Info : esp32.cpu1: Debug controller was reset.
Info : esp32.cpu1: Core was reset.
Info : esp32.cpu1: Target halted, PC=0x40000400, debug_reason=00000000
Info : esp32.cpu0: Detected debug stubs @ 3ffc0fc4
  
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Re: ESP32 Firmware Upload via JTAG Failing
Reply #1 - Dec 12th, 2022 at 10:36am
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Thanks for the report and the information.

If you select an ESP32 Devkit in Visual Micro (and set the other board options as needed) does the upload via JTAG work?

If you can also attach the full output as shown at the top of the page it will allow us to see the full configuration you have setup.
  
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Re: ESP32 Firmware Upload via JTAG Failing
Reply #2 - Dec 15th, 2022 at 1:44am
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No, using the ESP32 Dev Module does not work either.

I included both device outputs, not sure why the wrover output is less than half the size.

Thanks Simon
« Last Edit: Dec 15th, 2022 at 1:46am by Addio »  
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Re: ESP32 Firmware Upload via JTAG Failing
Reply #3 - Dec 15th, 2022 at 2:16pm
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Thanks for the update.

The percentage size difference is partially due to the different Flash Size from the board options implied by the Wrover, which are changeable on the Devkit.

Can you update your Visual Micro installation to the latest available and try this again?
https://www.visualmicro.com/page/Arduino-Visual-Studio-Downloads.aspx

Can you also confirm specifically which ESP chip and board you are using (e.g ESP32-WROVER on ESP-WROVER-KIT)?
  
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Re: ESP32 Firmware Upload via JTAG Failing
Reply #4 - Dec 17th, 2022 at 12:20am
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No problem thanks for the help.

Ahh I see.

Just reinstalled and it's still producing the same problem.
I will try to reinstall Arduino and see if that changes anything.
Edit: I just reinstalled both Arduino and the ESP32 boards and the output during the upload phase seems to be giving a bit more info.

My board is custom, I have 2 of them populated, one with the ESP32-WROVER-E-N16R8, and the other with ESP32-WROVER-IE-N16R8, both which use the      
ESP32-D0WD-V3, and are having the same issue.
« Last Edit: Dec 17th, 2022 at 12:59am by Addio »  
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Re: ESP32 Firmware Upload via JTAG Failing
Reply #5 - Dec 22nd, 2022 at 4:46pm
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Thanks for the update.

If you add a Local Board.txt to your project (vMicro > Add Code > Add Local Board.txt), then add in the below text:
Code
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debug.toolingsystem=gdbscript
# Most stable OpenOCD Version for newer ESP32 Boards
tools.openocd.debug.path={runtime.tools.openocd-esp32-0.10.1-2021.11.11.path}
tools.openocd.program.path={runtime.tools.openocd-esp32-0.10.1-2021.11.11.path}
tools.openocd.upload.path={runtime.tools.openocd-esp32-0.10.1-2021.11.11.path}

# Ensure Upload Pattern contains adapter speed
tools.openocd.program.pattern="{program.path}/{program.cmd}" {program.verbose} -s "{program.path}/share/openocd/scripts/" -f "interface/{openocddebugger}" -c "adapter_khz 5000" -f "board/{upload.openocdscript}" -c "echo -n {****[vMicro]**** Uploading App :}" -c "telnet_port disabled; program {{runtime.platform.path}/tools/partitions/boot_app0.bin} 0xe000" -c "echo -n {****[vMicro]**** Uploading Bootloader :}" -c "program {{build.path}/{build.project_name}.bootloader.bin} {build.bootloader_addr}"  -c "echo -n {****[vMicro]**** Uploading Sketch :}" -c "program {{build.path}/{build.project_name}.bin} 0x10000"  -c "echo -n {****[vMicro]**** Uploading Partitions :}" -c "program {{build.path}/{build.project_name}.partitions.bin} 0x8000 reset; shutdown"


Does this make any difference?
  
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Re: ESP32 Firmware Upload via JTAG Failing
Reply #6 - Dec 23rd, 2022 at 2:24am
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It worked!

Thanks a lot Simon.

There must be some noise in my circuit causing it to fail at higher speeds. Probably why serial programming doesn't work either.

Edit: Tried at 20000khz and it still worked so not so sure.
« Last Edit: Dec 23rd, 2022 at 2:29am by Addio »  
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Re: ESP32 Firmware Upload via JTAG Failing
Reply #7 - Dec 23rd, 2022 at 11:47am
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Glad to hear it got you up and running, 

We will review the OpenOCD versions over the coming weeks and expect the latest versions need to become the standard to cope with the newer models of chips.

Previously I thought it was only required for the whole new lines (C3,S2,S3 etc) however this proves otherwise.

  
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